htshang
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First of all, thank you very much for all of the you. Matybe I forgot to point out that the amplifier in my regulator is a current mode one. I do the ac analysis in closed-loop configuration, finding out the phasemargin is good. But when the voltagte difference between source(connect to positive power vext!, I use pwl source to simulate the power-up,for example :VVEXT! vext! gnd! pwl(0 1 3u 5)) and drain(regulator output node)is bigger than threhold voltage(absolute value),then regulator output will track the vext! not stay to vref(regulator input voltage) anymore. In my opinion, when the voltage difference is bigger than threshold voltage, the current mode amplifier can not work properly as usual. If the amplifier is a voltage amp, then the matter will disappear. Just as Berti said--a LDO will also work with vds of the power transistor well above threshold. ' For 'LDO devices vary over 30db in forward path gain as the PMOS transistor goes from saturation to triode region (a function of Vds)@loose-electron' I did not understand.
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