The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Aug 17th, 2024, 9:15am
Pages: 1
Send Topic Print
High Freq. Class E PA (Read 2924 times)
gorkhim
New Member
*
Offline



Posts: 6
San Jose
High Freq. Class E PA
Sep 22nd, 2008, 4:52pm
 
I was trying to simulate Class E PA with over 50GHz frequency using nanowire transistors in spectre (cadence). But, the input impedance (real) is negative. Is there any resource or solution to solve this problem? I was not able to find enough resources to solve the negative input impedance due to high frequency. I tried to use input matching network but the fmax went down to less than operating frequency.
Thank you
Back to top
 
 
View Profile   IP Logged
nano_RF
Community Member
***
Offline



Posts: 50
madison
Re: High Freq. Class E PA
Reply #1 - Sep 27th, 2008, 9:15am
 
Is this a single ended or differential design? In differential you can have some positive feedback given that you are working in nano regime.

Would you be willing to share your schematic?

The only way i can think of a negative real impedance in SE config is that your device is degenerated by a capacitor. Does this real part drastically changes with frequency?
Back to top
 
 
View Profile   IP Logged
gorkhim
New Member
*
Offline



Posts: 6
San Jose
Re: High Freq. Class E PA
Reply #2 - Sep 28th, 2008, 3:19pm
 
Thank you so much for your reply. Yes, it is single ended design. I have also attached my schematic ( used for impedance simulation). I am getting -ve real impedance around the operating frequency. For example, for 50GHz of design, I am getting -ve impedance for arround 45 to 70GHz. For other frequency it is +ve.
Do you think, I should not use single ended design? Please let me know, really appreciated.
Thank you....
Back to top
 

single_ended_schematic.jpg
View Profile   IP Logged
nano_RF
Community Member
***
Offline



Posts: 50
madison
Re: High Freq. Class E PA
Reply #3 - Oct 1st, 2008, 6:37pm
 
Hi,

Your schematic seems pretty straightforward, do not see any problem with the set-up to cause negative resistance. No, i did not mean to suggest that a differential design would take care of this issue. However differential design do offer lot of advantages.

Now coming back to the negative real impedance. Can you simulate the impedance of your final device without applying the class-E set-up. In other words what do you really get out of your device model? By the way what is input signal level in your PA setup?

Thanks
Back to top
 
 
View Profile   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.