Hi Aaron,

The GBW is set by the dominant pole location and obviously by the open loop gain. However the fist non-dominant pole will also set the unity gain frequency (fu), which will only be the same as the GBW if this second pole is at least at 5X higher frequency than the dominant one.
So pushing out the first non-dominant pole helps get the fu closer to the GBW, which has a direct impact on the stability (in this case it improves it).
So the real challenge is to move at higher frequencies the dominant pole with the same open loop gain (so GBW increases) without compromises too much the stability (which will be a function of the location of the second and higher order poles).
As you suggested, to push the dominant pole to higher frequencies it is the ft that you have to maximize (in case your amplifier is a single ended one your frequency limitation might be related to the capacitance of a diode connected MOS when you convert to single-ended).

Regards
Tosei

raja.cedt wrote on Oct 11^th, 2008, 10:10pm:


Hi a 1-pole amplifier has a 90 degree phase margin (phase does not rotate more than 90 degrees).  Adding a second pole (1st non-dominant pole) will set a smaller phase marging. According to the location of this second pole the phase margin will change.

raja.cedt wrote on Oct 11^th, 2008, 10:10pm:


Capacitor loads will bring secondary poles down to lower frequencies (compared with the resistive load only case). The discussion is general and regardless of what sets the location of the second pole (either the capacitor load - if exists - or a diode connected mos for example).

Regards
Tosei

aaron_do wrote on Oct 10^th, 2008, 1:54am:


Hi Aaron,

The issue is slightly complicated. Normally, I too agree with you that one is better off with as few poles as possible for highest possible bandwidth. If you are using Miller compensation, then surely you are creating an additional pole where there was none before at Gm1/Cc, whereas you could have created a pole simply using the load capacitance using a single-stage scheme. I don't think I can answer your question directly, but a few points:

1. If you really must design a Miller compensated opamp in the first place, then Gray & Meyer tells me (4th edition, Chap. 9 on stability, Fig. 9.10) that gain-bandwidth is highest with a phase margin of 60 degrees.

2. Of course, the farther you push out the second pole, the farther you can also push out the first one. What counts is only the ratio of these 2, assuming you do not run into any other higher poles. But pushing the second pole out means burning more power in the second stage. Note that artificially forcing the first pole to be too low is usually not a good idea, since you lose bandwidth. So if you end up with the 2nd pole way out and a phase margin of 80 deg, that means: (a) You have chosen too large a miller cap or too small a Gm1 and could increase the bandwidth a bit (b) You are wasting too much power in the 2nd stage (Note that the 2nd stage typically consumes about 3x-4x power in classical Miller design).

3. I am sure you have accounted for this, but if you are worried about settling response more than steady-state response, then you are better off with as high a phase margin as possible. However, as you are driving resistive loads, this is obviously not the case. And for your case, you are right, you need to increase the bandwidth of your output stage (I would not use the term fT which has other implications as well).

Regards,
Vivek

Hi Aaron,

You don't need the book by Gray & Meyer. You can check that the GBW is largest (without overshoot) with a phase margin of around 60 deg if you make a simple 2 pole opamp model with ideal elements in Cadence, and vary the second pole while keeping the first one fixed. Or you can analyze it by hand if you wish.

You are right about settling without overshoot in my statement. I consider this kind of settling as good settling because the performance degradation in case of process variations or reduction in time available for settling is more graceful than in the case of ringing.

As for your last point, I would put it a bit differently. Your Miller compensation will be degraded because of the capacitive divider formed by Cc and Cgs2. In other words, the effective Gm2 drops like this. So, you need to optimize the second stage between the 2 extremes of very high gm/Ids at the cost of very large Cgs2, and the other extreme of very small Cgs2 but very high current to achieve required Gm2 for stability. If you write out the simple equations accounting for the poles from stage1 and 2 and the cap divider (assuming the RHP zero is taken care of somehow), I am sure you can find out the optimal setting for gm/Ids so that you achieve stability and GBW at the lowest power.

For the first stage, I would use high gm/Ids, but be careful not to increase your input cap excessively.

Regards,
Vivek

The phase margin for no overshoot is 76° (for a loop gain with only one dominant and one non-dominant pole and no zeros), see http://www.rdmiddlebrook.com/D_OA_Rules&Tools/Ch%2010.Basic%20Feedback.pdf, page 95.

Kent Lundberg quotes his paper "Pole splitting considered harmful" in http://web.mit.edu/klund/www/papers/ACC04_opcomp.pdf, saying: "While the above results are correct and useful, they are an impediment to intuition." He also says in this paper: "A pole-splitting approach to the compensation design is harmful to understanding. All of these techniques can be easily understood in a simple classical-control framework."

aaron_do wrote on Oct 14^th, 2008, 5:53am:


Aaron,

The ouput resistance will not change due to Miller effect, but output impedance will get reduced. Intuitively this can be observed by just considering that at higher frequencies, the miller cap will be a short. Under this condition, the 2nd output impedance will be 1/gm₂ with Cin and Cout of this stage as the equivalent node capacitance.

Regards
Tosei