hi, all
 I have a question to ask you.
 in CT sigma-delta modulator, excess loop delay is from to sources: one is DAC input delay, the other is DAC clock to Q delay in DAC itself.
 in most books, there is a diagram which has two rectangles and the x-axis is time, one is rising at "0" point (the original), the other at a delayed time, "td", and then the books give method to compensate the delay time "td".
 I want to ask what is the y-axis, is it a DAC input or a DAC output? if it is a DAC output, then it means, both DAC input delay and DAC clock to Q delay can be compensated; if it is just the input of the DAC, then does it mean only DAC input delay (which is caused by quantizater ) can be compensated?
 in the book " Continuous time Delta-Sigma AD conversion" written by  M.Ortmanns & F. Gerfers, it doesn't tell the difference of the two delay reasons, and it seems the compensation methods can compensate both the two delay, right?

Hi,

I think that the phase-shift of the amplifiers will also contribute to excess loop delay.

Cheers