ramp78
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Posts: 1
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Hi,
I am stuck with this AMS error. In my testbench, I am instantiating the netlist as a symbol for one of the blocks.
I could able to pass the design-prep. While elaborating the design, I am stuck with the following error *E,SYERROR (/projects/temp5/dcbnvd/schematic/verilog.vams,91|3): Vector net cannot be connected to a Spice/Spectre instance by port name. Can someone help me?
ramesh
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