HdrChopper wrote on Nov 17th, 2008, 2:31am:Hi Humberto,
As far as I know, the folding process is due to the common mode interference modulating the bias current of the diff input pair. That combined with the a differential interference generates folding at DC.
My application is simple: just buffering of dc voltages exposed to HF interference, which I do not want to get folded back to DC.
Regards
Tosei
Hi Tosei,
In this case, I would advise even more strongly that you consider input filtering to eliminate HF interference. Supply filering should also help a lot. Usually, LDOs will provide atleast 1 level of supply rejection even at HF, depending on realization, which may not be sufficient by itself but could be supplemented with other things.
You will need to spend more area and maybe power if you want to get rid of HF noise. For filtering the input, you don't have to worry about I*R drop in the R but you also don't want more noise. So, you will be forced to use a large C and a moderate R. For filtering the supply, you have I*R drop to consider, and so you will have to use a small R and a large C. These are passive design tricks which you call "brute-force".
There are several active design tricks but I doubt if any will work at really high frequencies, because any active circuitry which has to filter out or suppress the HF noise will need large current to have high enough BW, and will itself be subject to the effect you are trying to suppress (demodulation).
Layout is critical for all approaches.
For the opamp, I would use a non-Miller structure for better PSRR, especially if there is noise at both VDD and GND. The Ahuja structure is your best bet (B. K. Ahuja, JSSC, Dec. '83 I think).
Regards,
Vivek