Hi all,

I want to design a limiting amplifier using nmos differential pair and nmos diode connected loads. Unfortunately due to the body effect, the sizing ratio between the loads and the differential pair has to be pretty huge even for moderate values of gain.

So i've come up with 2 simple solutions (there are other more complicated ones).

1) Use deep n-well transistors with source-body connection. Unfortunately I guess the matching will take a hit because of the increased device separation.

2) Use VNPN transistors. VNPN transistors are larger, but get better matching. I'm also not so sure how well modeled they are.

So does anybody have an opinion on which one would be preferable, or maybe even a better solution?

thanks,
Aaron

Hi Aaron,

Could you explain why you don't want to use PMOS loads (parasitics?)? The drawback I see with (1) is that the RWell (i.e. the local P-well) will be connected to the output node, right? This will increase the parasitics on the output and lower the BW of the limiting amp. In case (2), you will have an important penalty in area due to the bipolar device sizes.

Regards
Paul