ywguo
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How much tolerance for the duty cycle? ±%1 or ±5% ???
If you need very accurate 50% duty cycle, you'd better generate it out of a PLL or a DLL because they have very precise delays or phases.
If very accurate 50% duty cycle is not a need, a long inverter chain is a good replacement because it is simple, power saving, and of small area. The ~100 MHz clock is fed to the inverter chain, while it is sampled by the output of each inverter. Suppose one inverter has one unit delay, then it is easy to determine how much unit delay that one clock cycle is equal to. If one cycle is equal to 2N unit delay, the required signal of 50% duty cycle is made out of the outputs of the Nth inverter and the 2Nth inverter.
Yawei
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