I design a switched-capacitor filter, simulate its characteristics before layout, then I layout it by Cadence Virtuoso.
Now I want to simulate its characteristics after layout. The transient simulation is OK (by HSPICE), but I occur trouble on the simulation of PAC by SpectreRF.
Initially I rum PSS, the message say " out of memory"(the memory of our work station is 8GB), so I use swapfile command (I consult the document "Simulating Switched-Capacitor Filters with SpectreRF" from
www.designers-guide.com/Analysis), then the PSS analysis is complete, no problem.
After PSS, the simulator begins to run PAC, but the problem of insufficient memory happen again. Unfortunately I can not find the similar way to solve this problem.
How to solve this problem? Or the PAC simulation after layout is not necessary; it can not give any more information?