Peruzzi
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Mahavir:
To get value out of your time/design/area/power investment in mixed signal BIST (also known as calibration, offset correction, self-tuning, alignment): * Plan your mixed signal BIST earlier rather than later * Make the BIST observable and controlable (even if indirectly) from outside the package. At least for first Silicon on your first chip using M/S BIST because you'll have to convince yourself and your customers that it's actually working (or for debug) * Accept the fact that you won't be able to simulate the entire circuit at the device level, so plan to use AMS simulation and behavioral models * Begin with high level Verilog-AMS or VHDL-AMS models, then refine the models as you develop the design * Validate your models versus your schematics * When practical, evolve your models to use a signal flow approach and real rather than electrical quantities. This will greatly speed up your simulations. But beware -- it must be done right -- so validate, validate, validate * Consider bringing in a battle-scarred consultant (like me ;-) to help you through the process rather than assigning this absolutely necessary and critical, but tedious, task to an overburdened circuit designer
More and more IC and SOC designs are using M/S BIST. Its presence is now a competitive advantage, and soon will be a requirement.
Best of luck!
Bob P. Peruzzi@RPeruzzi.com
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