The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Apr 29th, 2024, 11:37pm
Pages: 1
Send Topic Print
Noise simulation in 0.13um CMOS (BSIM3v3) (Read 2874 times)
Berti
Community Fellow
*****
Offline



Posts: 356

Noise simulation in 0.13um CMOS (BSIM3v3)
Apr 06th, 2009, 5:32am
 
Hi all,

I have simulated (with both noise and pnoise analysis) a basic sample and hold circuit (see attachment) in a 0.13um CMOS technology. If I use the available Spice2 model I basically obtain the same results I get from hand calculations (kT/C). However, if I use the BSIM3v3 model the simulated noise is 40-60% lower.

Is there a physical explanation or can I simply not trust the BSIM model?

Regards
Back to top
a.jpg  
 

a.jpg
View Profile   IP Logged
vivkr
Community Fellow
*****
Offline



Posts: 780

Re: Noise simulation in 0.13um CMOS (BSIM3v3)
Reply #1 - Apr 6th, 2009, 11:42pm
 
Hi Berti,

Assuming that you have not missed out anything in the calculation, I would say that you cannot trust the model you have been given by your foundry. The BSIM3 model in itself should be OK. I have used it quite many times and it passes this basic check although the noise I get is not exactly kT/C but a few % more in most cases.

This is the unfortunate problem with models of higher and higher complexity which sacrifice physical common sense in order to model everything, and then someone forgets to characterize something correctly and puts in some number.

I would use the SPICE2 model in this case. You obviously know how to switch it with the noimod parameter.

Best regards,

Vivek
Back to top
 
 
View Profile   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.