Aaron,

You may consider providing more details about your design in order to get an adequate advice.  For example, if your digital blocks of the PLL are differential the overall capacitive coupled signals will cancel out as common mode and you won’t have any problems.  Also, if your filter cap is connected in single ended or differential configuration makes a difference.  If single ended, one plate is AC ground (or at least it can be assumed to be) and you can use it as shield instead of adding an additional ground plane.   Anyway, more details about your design may result in more specific advice.

Cosmin
NoiseCoupling.com
http://www.noisecoupling.com

Hi Aaron,

I think it is really risky to put divider and charge pump kind of circuits under your loop filter. Hard switching of these circuits generate very high AC currents as well as voltage on the supply (1MHz can not be effectively bypassed with reasonable size RC). The interferers coupled to loop filter modulate the VCO which can be converted to spurs. This is never a option for high performance pll.

Even if you add a ground plane. The groud plane is not perfect, the interfers still can be coupled to your loop filter. Of course, depends on the Kvco, and the application of your pll. The spur level might be acceptable. But I never dared to try that.

Hi Chenyan,

You are correct, the ground plate is never perfect and coupling from differential circuits does not completely cancel out.  However, many other things if not all in our designs are not perfect and we need to live with them like this.  

In a "good" conductive capacitor plate located above differential circuits, the inputs/outputs and differential signals couple capacitively equal magnitude and opposite phase signals, which of course if we assume negligible resistance and inductance in the plate cancel out.  We know this is never the case, but we know that this cancellation phenomenon happens to some extent, not completely.  Besides these differential signals differential circuits may couple transient switching signals, which are "single ended" and thus do not have equal magnitude and opposite phase cancellation signals.  However, this coupling is much smaller than in the case of single ended CMOS logic.

So yes, some coupling still occurs from differential circuits and it will always happen through different mechanisms even if we do not place the MIM cap filter above circuits. The effects and impact of this coupling on performance needs to be evaluated on each specific case, and the necessary performance-cost tradeoff needs to be decided also in each specific design.

Regards,
Cosmin
NoiseCoupling.com
http://www.noisecoupling.com

Mobil, can you please elaborate why you think that covering transistors with metal is "really risky!!!"?

Most transistors are somehow covered with metal due to metal-density rules.

Cheers

Personally I think its design suicide. Dumping a pile of active logic underneath the capacitor that controls the most noise sensitive node in a PLL?

Good luck with that. - Even if you put a metal grounded shield between them, I would still wager that you get some magnetic coupling.

Model the problem with some quantitative assumptions on noise coupling and see what happens.