LeeX
Junior Member
![* *](https://designers-guide.org/forum/Templates/Forum/default/starblue.gif)
Offline
Posts: 12
Singapore
|
I am trying to design a PMOS source follower (simple source follower circuit with two PMOS transistors). The desired input range is from 0.1 v to 0.6 v.
The problem is, for such a large input range, the channel length modulation effect is quite severe. Because of that, when the input is 0.1 v, I might get an output of 0.55 v, but when the input is 0.6 v, I might end up with 1 v at the output.
Is there any way to mitigate this problem, other than increasing the transistor length?
|