I don't know if the linearity will be that great if the output impedance is going to be 50 ohms. If the source impedance sets the output impedance at resonance, then the voltage swing across Vgs will be the same as the load. You could make the impedance smaller then match up to 50 ohms to help reduce the swing, or you could use some series resistance to help set the output impedance and reduce the voltage dropped across Vgs. Also the SF stage doesn't provide a lot of isolation from the RF output to your LNA load (capacitive coupling). i.e. a SF is not necessarily a no brainer buffer at GHz frequencies.

A resistively or inductively degenerated cascode CS stage buffer might be worth considering.