Hi all,


i'm not sure if this is really an odd error, but have a look and let me know if it can be solved. Basically I used Calibre to run LVS, and it gave me a netlists don't match result with a big green smiley face. I've attached the error. There were no discrepancies reported.

Not sure if i matters, but some of the subcircuits are from a .cdl file while the rest were drawn in the schematic editor.

thanks for the help,
Aaron