i have a simple switched cap filter as in the attachment. since the information is only captured at the end of phase 1, do i need to take care about if the opamp settles at the end of phase 2?

hi,
   whats this ckt actually, because its like variable gain amplifier not filter....

Thanks,
Rajasekhar.

Hi,
I think it's a high pass filter with cutoff defined by feedback components and gain at infinity defined by unswitched capacitors.now it's important that opamp settles at the end of charge transfer phase otherwise output is erroneaos and will lead to several problems like nonlinearity related distortion etc.you can start with a behavioral model and check filter performance with nonidealities in opamp like finite gain and UGB.

Hello SUBGOLD !

Some days ago you have asked a question concerning the function of a specific circuitry - and five community members made up their mind to find the task of the circuit.
Don´t you think now it´s your turn to tell us something about the purpose or the origin of the circuit ?
Or are you not interested anymore ?
Regards

Hi subgold,

Actually I was not suggesting the input cap was a switched cap. I was only suggesting a switch in series with it and the input of the opamp. that would provide sampling on your input cap and still perform a HPF action. Since there would be no reset during ck2 on such cap then it would not act as a resistor in average (in which case then you would get a LPF).

I agree that not switching the input cap performs HPF action, but without a sampled input (as opposed to what I was suggesting). Therefore you have a continuous-time output and I do not see why the opamp needs special settling requirements during ck2 (reset phase).

Regards
Tosei

HdrChopper wrote on Jul 7^th, 2009, 2:32pm:


Hi Tosei,

that's exactly my question.

do you mean for the shown schematic (no sampling on the input cap), it is not necessary to settle in ck2? other replies of this topic suggested it should, which is also what i thought at first. because although the information is only sampled in the end of ck1, the capacitor should also get the correct charge in ck2, in order to further process the information in ck1.

Hi subgold,

What I meant is that: since you are supposed to fulfil the settling requirements for clock phase 1, then settling requirements for clock phase 2 will be already covered since there is no sampling nor charge redistribution during that phase. Therefore the requirements are not as stringent as during clock phase 1.

Hope this clarify my viewpoint.
Tosei