Hi Rajdeep,

Yes this is very possible with AMS Designer. I could tell a few things on how to run this feature but the best for you is to look at following couple of Docs.

1. From the IC stream (my version is 5.10.41.500.6.138).
There is a PDF file called 'Workshop for AMSD Virtuoso Use Model'. Chapter 5 in this workshop is dedicated to what your are asking. The great thing about it is that you can go through the design database and exercise this topic on a real design, not just reading  the manual.

2. If you fancy reading the manuals, then the 'Virtuoso® AMS Designer Simulator User Guide' is all what you need. Again chapter 10 'Designing with Multiple Power Supplies' (in my IUS  08.20-s016) explains it all.

Hope this helps you for a good start !

Cheers  :)
Riad.

Its working!! The supply sensitive and ground sensitive method is working fine.
There seems to be another method which is based on block-based discipline resolution!!
Now Im not yet sure how to make this one work.

Does anyone have any preference between these 2 methods?

cheers!
Rajdeep

Never too late Riad!! Ive another question for you :-D
In the supply sensitive approach, if a connect mocule E2L say connectes to two pins Y and X.
Y ---> AVIN and DVOUT --> X ( --> means connections)

Now Y has a supply sensitivity to a supply net of 2V
and X has a supply sensitivity to a supply net of 10 V (Just some weird things I was trying).

So, how the E2L block resolves which sensitivity to pick up, 2 V or 10 V?? I guess it should pick up the one which is connected at AVIN in this example, because Y is driving X. The simulation results is also suggesting that. But  Im not liking it!!!! Because the simulation will suggest wrong results.

Wonder what will happen in case of BIDIR connect modules.

Would be great if you could help me understand this. Let me know if my question was not clear.

Thanks!
Rajdeep

Thanks Boe!!

Yes the design has a bug and that is precisely why Im asking abt the question, because I wud like to catch this bug from simulation. That is I missed a level shifter!!!! If the E2L connect module incorrectly gives me a logic 1 output the verification wud be crap!

Quote:


What is the exact rule? I mean there should be some deterministic algorithm here. I guess it prefers the driver side. Pls. tell me if Im wrong! And if it is at driver side then it is actually not very good because it wud fail to detect the bug.

There seems to be noway user can define in a connect module  which sides supply sensitivity to take??
Or is there any?

cheers!
Rajdeep

Hi Rajdeep,

Quote:


The rule is very simple. You have a A2D connect module. The algorithm searches for the digital ports to which the CM is connected to, i.e. X in your case. So if X has got a supply sensitivity to VDD=10V, then the CM assumes 10V as analog Vsup.

The Supply Sensitive algorithm always looks at the digital ports to which the CM is connected, for both A2D and D2A CMs. A more detailed algorithm is available in the 'AMS Supply Sensitive Connect Modules Application note' from sourceLink (http://sourcelink.cadence.com/docs/files/Application_Notes/2007/AMS_Supply_Sensi...)

This works in a similar way for bidirs as well.

Now I have fully understood your question, I have realized that the 'Supply Sensitive' approach is not the one I'm using at all, I still wonder why I have said I was using it above ? I was maybe thinking of that approach ...

Anyway, I personally would not recommend using that supply sensitive approach, Why ?

1. This approach requires the modification of all your digital cells to match the supply voltages as defined in your connect modules.

2. This approach works with the 'detailed' discipline resolution only, i.e. more CM inserted, more simulation time although you ultimately get rewarded with a better accuracy.

3. Examples 'inv' and 'inv2' in the above application note are using PWR/GND as part of the module's port list. This is very likely to breack the AMS flow when used in cellBased netlisting along same modules without the PWR/GND in the port list. Just imagine 2 verilog views, one with PWR/GND in the port list and the other view without. This should not be a problem in OSS but is definitely not going to work in CB netlisting.

My advise is to use either methods I have mentioned in the AVUM workshop in my very first post. The one I tend to use (I have all my intelectual faculties with me tonight) is the 'Multiple Supply Based on Digital Discipline'. It's very simple and very handy for ADE users. Downside is the indvidual selection of modules in the hierarchy, which might annoy your Senior fellow ...  :-[

Hope the above is useful for you ...
Cheers,
Riad.

Hi Rajdeep,

Quote:


The AMS Virtuoso use model (AVUM) workshop is in
$CDSHOME/tools/dfII/samples/tutorials/AMS. Please look at chapters 5 and 6. I’m working with the method in Chapter 6 as far as I’m concerned.
This AVUM workshop is really great to work with AMS Designer

Quote:


I think there is a mistake in this file. The aVal should be calculated with a transition statement in the analog bloc.
I looked at the code and found the following:
Code:

V(nn) <+ transition( (dVal == 1 ? vdd : vss), td, tr, tf); 

Well, I’m wondering whether this ‘nn’ is an unfortunate copy/paste because I don’t see where it is used. I would put aVal instead of nn.

We are going to use OSS (irun) method as per our CAD guyz. So, this should work. But, the fact that it will slow down the simulation is something to worry about. So, I would like to know the other method also so that we can switch between two when reqd.

What obliges you using the detailed discipline resolution algorithm is the supply Sensitive approach, not OSS itself. Well, the detailed algorithm is not that harmful. The detailed discipline resolution has advantages as well. The best for you is to look at the doc and see a comprehensive explanation. It’s then down to you to decide whether you want it or not. Again, the main reason I don’t want to use the supply sensitive is because the need of updating all the digital libraries.
Just FYI, you can run AMS Designer in either OSS or Cell Based netlisting. Cadence recommends the OSS.

Quote:
.

Well, it would be better if you could post an example I suppose ...

Cheers
Riad.

Hi Rajdeep,

Yes, the detailed discipline resolution MUST be switched on for both Supply sensitivity and inherited connection approaches.

As I said earlier, the major hurdle that prevents me from using the SS approach is the fact I need to update all the digital libraries. One inverter is easier to manage indeed Having said that, a pretty simple Perl script is good enough to generate new views for the SS.

Anyway, hope your CAD guys would be pleased doing this for you

Cheers,
Riad.