Hi to everybody!
I'm using AMS Simulator (in Cadence SPB 16.01) and I am stuck with a problem... would you try to give me your opinion?
I need to improve a simulation with realistic components: if current flows through a resistor, it heats up, and its resistance changes; this, in the next seconds, will affect the current flowing through it.
I didn't find a way to simulate it with a single transient analysis ...
I tried to write expressions in the resistors, but AMS Simulator doesn't support variables TEMP or TIME in standard components. I tried to define parameters, but the problem remains. I tried to define new resistor models, but I found only a simple function, depending by 3 parameters; besides, AMS Simulator doesn't change the temperature of the components during transient analysis, so this last feature could be used only in parametric analysis. I also tried with Analog Behavioural Modeling, but I didn't understand very well how it works.
Any suggestions?
Thank you for the help you'll give me.
Cheers,
Emmanuele

Thank you Rajdeep for your reply.
Yes, I can find out how the resistance changes with respect to the current. But my function T = g(I) will depend on the resistance itself, because T depends on the integral of the current, which in turn is driven by R.
Besides, I don't know what Verilog-AMS is. Is it a language or an actual software?
I thought to add parameters which change with the istantaneous value of I or R, and thus simulating a change of T, but it seems AMS is smarter than me... because it doesn't accept a parameter definition depending on TEMP.
I read the only way to use parameters such as TEMP or TIME is using Analog Behavioural Modeling, but I didn't get how to use this feature.

I see...
Thank you, I'll try to learn this new language. (I don't know if this'll fix my problem, but it seems interesting anyway.
Just one doubt: how can I create a verilogams? With Design Entry?
Should I not be able to change temp on the fly, I could set a variation in the resistance which doesn't depend directly on the temp. (the temp variation could be written as dependant on current only) What do you think?

Quote:


This should work. Anyways, a link to such a complex model has been provided. May be that could be helpful. But what you said, according to me should work.

You can create verilogams view of you resistor model. The way you create a schematic and/or symbol view of a circuit. In the dropdown, you should be able to find veriloga and verilogams views. Choose the one you like. A text editor should open, write your model. Save and close. That should call the compiler which will tell u if any syntax error is there. Create a symbol of it and use it as any other design block. I have assumed you are using Cadence ACE environment to create your design blocks.

(Note that Verilog-A is a subset of Verilog-AMS language)

cheers!
Rajdeep

Thank you folks.
It seems I have a lot of work ahead...
I'll work on the Verilog manuals - funny how ten new things to learn appear when you've just got one!
If I got it right, I have to define a schematic project (ie in Design Entry) and then to associate verilogams to some components. right?
Cheers,
Emmanuele

Hi Emanuele,

You better post the exact warnings/errors because
Quote:

Is not that helpful I'm afraid.

Anyway, I have created the following shiftPlus5.va file:
Code:

`include "constants.vams"
`include "disciplines.vams"

module shiftPlus5(in, out);
  input in;
  output out;
  voltage in, out; //voltage is a signal flow
  analog begin
    V(out) <+ 5.0 + V(in);
  end
endmodule 

I have compiled the above code using:
Code:

spectre #dpl /dev/null #ahdlfile shiftPlus5.va 

It all worked fine !
Now, I have compiled my code using Spectre (The Cadence's Spice-like simulator). I don't have any idea about your tool you mentioned above.

Also, If you are interesting in modeling resistors whose value depends on the Temp, then you may look at the model files in your PDK too. Modern PDKs/technology nodes provide these kind of models.

Cheers,
Riad.

Thanks for your replies.
I'm working with Cadence SPB, a suite of software which comprises a schematic editor, a PSpice simulator (AMS Simulator), a part developer, and a lot of other software. And it doesn't comprise Virtuoso, ICFB, nor Spectre.
In one of these software, theoretically it's possible to import models written in Verilog (or VHDL), but every file I try to import gives the same problem.
I also tried Riad KACED's code, but it doesn't work all the same.
Below you can see which errors I got with the implementation:

-------------------------------------------------------------------------
10/16/09  14:04:15      SPLBPD-461      Import failed because of an error on line 7 and token ',' in file \\Desktop/12334.v. Correct the input file and reimport.
10/16/09  14:04:15      SPLBPD-461      Import failed because of an error on line 7 and token 'out' in file \\Desktop/12334.v. Correct the input file and reimport.
10/16/09  14:04:15      SPLBPD-461      Import failed because of an error on line 8 and token 'analog' in file \\Desktop/12334.v. Correct the input file and reimport.
10/16/09  14:04:15      SPLBPD-461      Import failed because of an error on line 9 and token '<' in file \\12334.v. Correct the input file and reimport.
10/16/09  14:04:15      SPLBPD-461      Import failed because of an error on line 10 and token 'end' in file \\Desktop/12334.v. Correct the input file and reimport.
10/16/09  14:04:15      SPLBPD-261      Could not load Verilog file \\12334.v. Incorrect format.
-------------------------------------------------------------------------

I'm sorry, maybe I asked help in the wrong forum...

If it doesn't know voltage (or electrical, which is what I would have chosen), then maybe you haven't included 'discipline.h" or "disciplines.vams" where this stuff is defined.