rajdeep
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Ya! 1% accuracy is possible with standard architecture, with additional things like cascoding to achieve better PSRR. The accuracy also depends on the process. For example, I had to migrate a design from 600nm to 180nm CMOS process. Same architecture, some tweaks, but the accuracy was really good. Thats because this new process of 180nm has better matching, and the tempco of the resistors are also a bit better. Finally, trimming is highly recommended if such accuracy is reqd. But then curvature correction at one trim combination is ok.
So, to make a comment on the main question, I guess use the standard architecture, and have trimming option.
The LDO idea was also nice. In fact something that we follow because that LDO can be used for other purposes also, like supplying some logic portion in other part of the chip. But just to design a standalone bandgap IP, it depends on your area, power requirement!
Just some comments! You have to design it anyway :P cheers! Rajdeep
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