OK. some confusion I guess - Let me see if I can clarify, or maybe make things more confusing -  ;D

Use of an LDO over the bandgap to isolate the supply - In principle I have no problems with this. My only thought here is that a BG puts out a DC signal and the BW of your final system should be near 0Hz anyway, so power supply noise had better be suppressed pretty heavily as it is. If it is just keeping the BG circuits quiet, thats fine, but this is noise that should be above (in frequency) the BG output signal and can be taken care of by other means. I have no problems with a quieter supply.

Keep in mind people use chopper methods in BG's all the time (reduce all the offsets in the system and frequency shift the flicker noise) and all the transient junk introduced by the chop circuits gets filtered out before you use the reference.

As for cascodes? Are we talking in the BG amplifier or elsewhere? My cautionary here is that an amplifier that uses a cascode generates a lot of inherent noise due to the high impedance of the cascode. That's generally white noise (thermal equivalents) and needs to be considered. I suggest there to do a noise analysis and see how it contributes.

The use of active amplifier loads (cascode or not) will also contribute flicker noise that will land at DC and effect your BG voltage output. A lot of low noise bandgaps will use resistive loads only and even drop to lower resistance values (higher currents to keep everything at the right op point) to reduce the thermal noise of the system.

Depends on what your system is getting used for. I have done stuff where the thermal noise of the BG was an issue (it mapped to spectral spreading in a transmitter) and other places where it was not that important, but curvature correction over temperature was more important.

Did I just confuse things more?

RobG wrote on Oct 19^th, 2009, 9:37am:

Hmmm... On the cascode - do an analysis using active loads (Mosfet) and the same impedance resistors and (ideally anyway) the resistor will be white noise dc to daylight, and the mosfet will be a mix of LF flicker and wideband white noise.

I struggle with this issue in gmC filters a lot because you end up using PFET active loads and they end up being an ugly noise source.

As for flicker noise from a resistor?
You betcha! especially in small geometry resistors!

Keep in mind that flicker noise is a source from the capture and release of electrons along the edge of the junction. When the "energy to push the electrons along" (I am searching for a fancier semiconductor physics terminology way of saying this) creates an inconsistency in the "capture and release" the net result is flicker noise. Bigger W and L in Mosfets means fewer electrons travel along this "edge zone" and you get less flicker noise. In a similar manner, bigger W, L and H (height or thickness of the resistor layer) leads to fewer electrons along the edge and less flicker noise.

Im no expert in noise, but some of the discussions in this page is just awesome!! Loved the flicker noise explanation by loose-electron in the last para.

Anyway, coming back to cascodes. This is what loose-e mentioned:
Quote:


Can I make an analogy like, a higher impedence means higher resistor and hence more thermal noise?

cheers!
Rajdeep

loose-electron wrote on Oct 20^th, 2009, 7:49am:


Hi Jerry,

I think your comparison (resistor R vs. MOS with output resistance R) ia also unfair. Firstly, this is valid only for small values of R and/or for more advanced processes where the MOS output impedance is poor.

While an active load is noisier in this case (and this case is seen in gmC stages, CML and LNAs), it is dangerous to extrapolate this to mean in general that a MOS active load is noisier for the same target gain and power supply. After all, a resistor has to support DC drop across it whereas an active load can potentially achieve far higher Rout for the same drop.

Moreover, active loads that achieve higher Rout need to be made with longer L, smaller W => smaller gm of active load => tendency towards lower noise. So in an opamp, the above argument would not hold. 1/f noise is generally worse in MOS transistors than in poly or other resistors but I don't know if a general claim is possible.

1/f noise can be device engineered, which means that not all active loads will be as noisy, e.g. a BJT active load would have much less 1/f noise than even a poly resistor (although a horrendous thermal noise since its gm is going to be high).

Regards,

Vivek

I'm with Vivkr on this one, (but I could be missing something). I just don't see how cascodes in the opamp will make things much worse and their advantages outweigh the small noise increase. You have higher impedance, but that means more gain, which is going to benefit you more than the marginal increase in noise from the cascodes. The overall noise is the noise of the opamp in feedback configuration, not open loop. A design like this will also need high gain for other reasons.

Passive loads have less noise than active, but they cost headroom. The noise from the loads is attenuated by the ratio of the load gm to the input diff pair gm, so it can be managed and made small if necessary.

rg

Thanks, that helps. I was giving you the benefit of the doubt for a while, but figured it was best smoke out what you really meant by insulting your intelligence

Hi all,
Thanks a lot for the nice discussion....
@Rajashekhar-----can you give me any book or material that you are referring....also pls give me your mail id....
@Chopper----i have no idea abt chopper method used in bandgaps....can you pls clarify me how it is used??
@RobG----can you pls send me the thesis you are referring to or any other materials...
regards,
Manodipan

Hi all,
So as we were discussing one of the way to get better tempco accuracy is curvature compensation....now i am referring to the paper titled "Curvature compensated BiCMOS bandgap with 1V supply voltage" by Maloberti et al.....In this paper i implemented the circuit given in Fig.4...now i don't get proper compensation as desired ....Can you guys tell me how to choose the value of R4 and R5 carrying nonlinear currents...
Also it seems that with process the temperature compensatio curve varies...so i need to put a trim here..for example of mentioned Fig.4 in the reference, trimming is to be done for R1 and R2...
kindly clarify my doubts..
Regards,
Manodipan