hi,
   have you tried curvature compensated band gap?

Thanks,
Rajasekhar

Hi,
     Normally when you design a Band-Gap(say PTAT), it's variation is kept usually below 10%.
For higher accuracies, Go for a Curvature Compensated (PTAT + CTAT) Config as raja suggested.
Also, if your supply is noisy,
You can also go for cascaded BandGaps. Funda being you first generate a local reference through a BandGap, feed it to LDO,now give the local stabilized reference to the final BandGap.
This can give excellent results in case of noisy supply.

thanx,
Mayank.

manodipan wrote on Oct 14^th, 2009, 4:43am:


This is very challenging. You'll need curvature compensation unless your temp range is tight (say +/- 30C). Bigger issue: you will also need to trim out variations in sheet resistance and bipolar Is and various mismatches. A 20% change in sheet resistance or bipolar IS will cause a 0.4% change at room temp and more at 125C. Opamp offsets can easily add that much and are difficult to trim out without screwing up the temp co, so you will need offset compensation (chopping, etc) or trim at two temperature points. Substrate noise can cause DC shifts on that order. PSSR is a comparatively easy thing to solve using high gain opamp in your circuit. Oh, and changes in packaging stress from plastic packages will cause hysteresis when temp cycling and unpredictable tempco. Don't forget bandgap references voltages change as the circuit ages.

Current reference has all those problems and it is directly proportional to the resistor used to generate the current. I doubt if you can build a current reference to 0.1%.

I guess what I'm saying is that you should relax the spec or find a new boss

Ya! 1% accuracy is possible with standard architecture, with additional things like cascoding to achieve better PSRR. The accuracy also depends on the process. For example, I had to migrate a design from 600nm to 180nm CMOS process. Same architecture, some tweaks, but the accuracy was really good.
Thats because this new process of 180nm has better matching, and the tempco of the resistors are also a bit better. Finally, trimming is highly recommended if such accuracy is reqd. But then curvature correction at one trim combination is ok.

So, to make a comment on the main question, I guess use the standard architecture, and have trimming option.

The LDO idea was also nice. In fact something that we follow because that LDO can be used for other purposes also, like supplying some logic portion in other part of the chip. But  just to design a standalone bandgap IP, it depends on your area, power requirement!

Just some comments! You have to design it anyway  :P
cheers!
Rajdeep

loose-electron wrote on Oct 16^th, 2009, 5:26pm:

Hi Loose-e. I know you know your stuff, but could you please elaborate? I don't understand how using an LDO to provide a power supply for a BG reference will add noise (it should increase power supply rejection), or how a cascode is noisy.

rg

Hi Jerry,

Why would cascoding add significant noise? Some thoughts from my side:

1. Generally, the contribution of the active load is far more signicant than that of the cascode (by factor gm*ro) to any noise current.

2. Then we come to noise bandwidths. If the cascode has much more of it, then maybe its contribution referred to the input would increase as the load mirror frequency response drops off, but I would say that this is generally not so significant.

3. What could worsen the noise when using cascodes is the fact that you need extra headroom to accomodate these => you need to live with lower Vds on the active load => the active loads are made with larger W/L and have higher gm => you have more noise from the load devices than you could potentially have if you didn't need to sacrifice any headroom for that cascode. This difference can be significant for lower supplies.

Are we on the same page or do you have something else in mind?

Regards,

Vivek

hi rajdeeep,
                  could you please explain what is " Liked the higher gm => higher noise analysis though!!"

Thanks,
Rajasekhar.