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ldo pass transistor lay-out (Read 2647 times)
Dipankar
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ldo pass transistor lay-out
Dec 31st, 2009, 7:37am
 
Dear All,

             Is there any special attention needs to be taken for ldo pass transistor (pmos) lay-out ? I use n+ bulk ring (connected to VDD)  for each multi-plier and use another wider n+ bulk ring to surround all the multipliers. Also try to keep the whole mos shape close to square. Should i use a nwell ( VSS) ring outside the p ring ? any other recomendation ?
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With Thanks and Regards,
Dipankar.
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Mayank
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Re: ldo pass transistor lay-out
Reply #1 - Dec 31st, 2009, 7:49am
 
Hi Dipankar,
                  Can you pls explain Why place a ring around each multiplier ?? I thought the closer the fingers, the better the matching right ??
     A thick ring covering all the multipliers is understandable...

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Mayank.
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Dipankar
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Re: ldo pass transistor lay-out
Reply #2 - Dec 31st, 2009, 8:32am
 
If I don't use bulk ring for each multipler then there will be many devices from which the distance of bulk contact will be ~100 um. That means you allow the stray minority electrons to flow in the nwell for a long distance before collected by the bilk contact. And for this pass transistor matching is not impotant (match with whom ??? ). Only concern is that  things remain consistent between simulation and silicon.
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Re: ldo pass transistor lay-out
Reply #3 - Dec 31st, 2009, 2:24pm
 
matching in a large power transistor is important in the bipolar world, but not as much in the CMOS world.

CMOS devices are self balancing to get equal current thru all parallel devices. Bipolar devices are not.

Two things on geometry with the pass transistor -
1. Keep the transistor width short enough so that the gate stripe resistance does not become an issue. (its an RC time constant thing, go figure frequency of the control signal vs. RC of the gate across the transistor width.
2. Extensive well tie ups are needed to keep the bulk tied to the positive power.

With those 2 things, you end up breaking the transistor into an array of smaller devices tied in parallel.

jerry
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Jerry Twomey
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Contract IC-PCB-System Design - Analog, Mixed Signal, RF & Medical
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Dipankar
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Re: ldo pass transistor lay-out
Reply #4 - Dec 31st, 2009, 7:05pm
 
Thank you Jerry. I do the same.
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Dipankar.
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