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hala youssef New Member Offline Posts: 5	spectre RF simulation Jan 08^th, 2010, 6:46am Where can I write the -E command to use spectreRF simulation to run the ac analysis of switched capacitor circuit?
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Ken Kundert Global Moderator Offline Posts: 2386 Silicon Valley	Re: spectre RF simulation Reply #1 - Jan 8^th, 2010, 9:34am Presumably you are asking how to apply spectre to Listing 1 of http://www.designers-guide.org/Analysis/sc-filters.pdf. Use ... Code: spectre -E tah.ckt -Ken
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hala youssef New Member Offline Posts: 5	Re: spectre RF simulation Reply #2 - Jan 12^th, 2010, 4:11am Hi, I want to know where can I write this command "spectre -E tah.ckt "? Also, is it mandatory to describe the circuit using verilogA or it is possible to use schematic view for the circuit description? Additional information: I am trying to design SC BPF and I need to make the ac analysis for my circuit.
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pancho_hideboo

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Re: spectre RF simulation
Reply #3 - Jan 12^th, 2010, 4:29am

hala youssef wrote on Jan 12^th, 2010, 4:11am:

I want to know where can I write this command "spectre -E tah.ckt "?

Enter as Unix Command.
See http://www.designers-guide.org/Forum/YaBB.pl?num=1192525133/20#20

hala youssef wrote on Jan 12^th, 2010, 4:11am:

Also, is it mandatory to describe the circuit using verilogA or it is possible to use schematic view for the circuit description?

It seems you don't understand netlist for simulator.
You have to write Verilog-A block as Verilog-A code.
But for instantiation of it as test bench netlist of spectre with analysis statements and signal source statements, you can do it by either text editor or schematic view.

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hala youssef New Member Offline Posts: 5	Re: spectre RF simulation Reply #4 - Apr 7^th, 2010, 11:46am Sorry, my question was not accurate. My question is how can I use the analog environment in cadence to make the ac analysis of switched capacitor circuit?
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smalin

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Re: spectre RF simulation
Reply #5 - Apr 9^th, 2010, 3:55am

hala youssef wrote on Apr 7^th, 2010, 11:46am:

My question is how can I use the analog environment in cadence to make the ac analysis of switched capacitor circuit?

This is how I do it with my BPF:

1. On schematic put voltage source on the input and set PAC magnitude to 1. Do not forget to put clock source.

2. In ADE choose PSS and set parameters
- clock is from shematic - set fundamental to auto calculate
- number of harmonics 0
- tstab to what you need

3. In ADE choose PAC and set parameters:
- PSS beat freq should be set automatically
- start, stop and others like for AC
- maximum side bands 0

Start the simulation.

BR

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