DoYouLinux wrote on Jan 17th, 2010, 11:04pm:I just would like to know that, in order to do a load-pull simulation,
do you need to match the input of the transistor for a driving 50-ohm source before doing the load pull ?
For me, I think this is nonsense because we do not know the width and the bias of the transistor in advance.
So I just bias the gate and the drain using ideal bias tee (big L and big C) and doing the load pull.
Do you think this is OK ?
As far as S
12 is relatively small, it is OK.
See the followings. In this example, Load-Pull simulation is executed without input matching.
http://edocs.soco.agilent.com/display/ads2009/Load-Pull+SimulationsIn Load-Pull Simulation, you have to control different impedance value as load impedance for each harmonics including fundamental.
Assume Z
load(n*f
in),n=1,2,3,4,5,....., generally you have to set these as different values each other.
However it is not so critical for your case, because your PA is class-A operation.
Also see the followings.
http://www.designers-guide.org/Forum/YaBB.pl?num=1242184095http://www.designers-guide.org/Forum/YaBB.pl?num=1239997125
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Designing class A RF power amplifier: load pull test (Read 2872 times)