Hi,
I am designing a voltage doubler charge pump regulator, It's realized by four power transfets. Charge is transferred into the flying capacitance Cfly in the first half of the period and during the other half of the period,Cfly transfer its charge to Cout and the load.
Theoritically the charging speed of Cout at the charging phase and the discharging phase are the same. However, during the discharging phase, it starts with no current flow through the power supply, and at the end of the phase, the current flow through the power supply is much larger than 2Iload.
My question is ,How can I reduce this transient current?
my reference papers include "charge pump with active cycle regulation closing the gap between linear and skip modes" and "current mode charge pump:Topology,Modeling and Control".

Hi, thanks for your reply!

Do you want to reduce the maximum transient value?

Yes.
Do you want to draw a constant current, 2*Iload, from the power
supply so the ratio between average and maximum current
is smaller?

Yes.

Do you bypass/filter the voltage doubler?

Yes. there is a big capacitor could filter the ripple of Vout.

Is the there some reason, for example, needto reduce EMI, that
determines this requirement?  

Not for EMI, the transient current is so big that I have to increase the width of metal on the chip layout.
To reduce the chip size I want to refuce the transient current.

Do you want to reduce the transient during one mode, for
example, skipping mode?

My structure belongs to linear mode.