akhil
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Posts: 9
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Actually i wanted to design 64 bit prefix adders..so while writing the verilog code i wrote output [63:0] c [1:0] ; as i wanted to store 64 propagate and generate functions ...i.e for each bit i would store the G and P ... but it was throwing up error during compilatio
Secondly , can i get some web link where i can find more about prefix adders in terms of verilog code not the description part
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