hi guys,
i have some doubts about esd, would you plz be so kind to help me out.
1. which one is more sensitive to esd?  oxide or diffusion
2. why we need to protect the drain of nmos to vin, but not the source of pmos?
3. when using ggnmos,  suppose there is an zap from input pin to ground, which mechanic is occurred? does parasitic bjt of the nmos discharge the esd charge or the nmos has been turned on? ( because we usually add a resistor between the gate and ground)

refugee wrote on Mar 7^th, 2010, 11:47pm:


For #1, It's not so easy to answer...  Gate oxide is pretty robust to high voltages for very short times, within reason of course.  Diffusion can also be robust as long as the thermal effects when in breakdown don't destroy the junction.

For #2, I think you have probably seen that nmos require stricter ESD rules than pmos.  The simple reason is that the mobility differences make the nmos the weaker of the two devices for ESD so more focus is on protecting them.

For #3, The ggnmos is a combination of both the parasitic npn transistor from drain/bulk/source and the nmos channel.  The cgd of the device charges the gate during ESD and the resistor helps to raise the gate voltage to get a channel formed, which increases the current being dumped into the npn, making it easier for it to snapback.

Dan Clement wrote on Apr 13^th, 2010, 9:55pm:


Hi Dan,

Although what you suggested is essentially true for the gate oxide lots of successive events (even those very short time ones) might create a gradual degradation to the oxide which might not show up as  fully damaged oxide but a barely leaky one. Some cases this is not acceptable either.

Best
Tosei