pacej51
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Hi.
I am trying to implement an ideal op-amp (opamp) with a variable gain. This gain is dependent on a bit called NINV (see code below). If NINV is ‘0’, the gain should he +1; if NINV is ‘1’, then the gain is -1.
The code below works as intended if I simply remove the IF statement involving NINV (line 115 to 119) and set opAmpGain to the desired gain (+1.0 or -1.0).
The code, as currently shown, ignores what opAmpGain is set to at lines 116 and 118 and uses the initialized value (QUANTITY opAmpGain : REAL := 1.0;). Is there any way to use NINV to set the op amp gain?
Thanks in advance, Jim
BTW, “-- The DC voltage source definition begins” is line 2.
---------------------------------------------------------------------- -- The DC voltage source definition begins..... ---------------------------------------------------------------------- -- Schematic of the DC voltage source: -- ------------------------------------------- -- -- p o----(~)----o m a DC voltage of amplitude Value ---------------------------------------------------------------------- LIBRARY DISCIPLINES; LIBRARY IEEE;
USE DISCIPLINES.ELECTROMAGNETIC_SYSTEM.ALL; USE IEEE.MATH_REAL.ALL;
--entity declaration. ENTITY dcSource IS GENERIC (value: REAL); --voltage value given as generic parameters. PORT(TERMINAL p,m: ELECTRICAL); --Interface ports. END;
--architecture declaration. ARCHITECTURE behav OF dcSource IS --quantity declarations. QUANTITY v_in ACROSS i_out THROUGH p TO m; BEGIN -- The DC voltage source equation. v_in==value; --input DC source END; ---------------------------------------------------------------------- -- The resistor definition begins..... ---------------------------------------------------------------------- -- Schematic of the resistor component: -- -- p o----/\/\/\----o m -- ---------------------------------------------------------------------- LIBRARY DISCIPLINES; USE DISCIPLINES.ELECTROMAGNETIC_SYSTEM.ALL;
ENTITY resistor IS GENERIC (resistance : REAL); --resistance value given as a generic parameter. PORT (TERMINAL p,m : ELECTRICAL); --Interface ports. END resistor;
ARCHITECTURE behav OF resistor IS QUANTITY r_e ACROSS r_i THROUGH p TO m; BEGIN r_i == r_e/resistance; -- The ohmic resistance equation. END behav; ----------------------------------------------------------------
---------------------------------------------------------------- --ideal operation amplifier -- _____________ -- | \ -- p o---|--------| \ -- m o---|--| | \ -- | < < \ __ o a -- | < r1 < r2 / -- | < < / u_a = (U1-U2) * value -- | |_____| / -- |________o___ / o -- | | -- --- gnd --- gnd ---------------------------------------------------------------- LIBRARY DISCIPLINES; USE DISCIPLINES.ELECTROMAGNETIC_SYSTEM.ALL; --entity declaration. ENTITY opv IS GENERIC (value,r_in_minus,r_in_plus : REAL); --generic parameters. PORT (TERMINAL p,m,a : ELECTRICAL); --Interface ports. END; --architecture declaration. ARCHITECTURE behav OF opv IS QUANTITY u_1 ACROSS i_1 THROUGH p TO electrical_ground; QUANTITY u_2 ACROSS i_2 THROUGH m TO electrical_ground; QUANTITY u_out ACROSS i_out THROUGH a TO electrical_ground; BEGIN
i_1==u_1/r_in_minus; i_2==u_2/r_in_plus;
u_out ==(u_1-u_2) * value; END; ---------------------------------------------------------------- -- testbench LIBRARY DISCIPLINES; USE DISCIPLINES.ELECTROMAGNETIC_SYSTEM.ALL;
ENTITY network IS END;
ARCHITECTURE behav OF network IS TERMINAL n1: ELECTRICAL; TERMINAL n2: ELECTRICAL; TERMINAL n3: ELECTRICAL; TERMINAL n4: ELECTRICAL; CONSTANT NINV : BIT := '1'; QUANTITY opAmpGain : REAL := 1.0; BEGIN -- Input vin : ENTITY dcSource (behav) GENERIC MAP (3.0) PORT MAP (n1, electrical_ground);
-- Series Resistors r1 : ENTITY resistor (behav) GENERIC MAP (4.0e3) PORT MAP (n1,n2); r2 : ENTITY resistor (behav) GENERIC MAP (4.0e3) PORT MAP (n3,electrical_ground); -- GF Amp if NINV = '1' use opAmpGain == -2.0; else opAmpGain == 2.0; end use; opamp : ENTITY opv (behav) GENERIC MAP (1.0*opAmpGain, 1.0e6, 1.0e6) PORT MAP (n2,n3,n4); END;
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