I try to simulate the Q factor of a nmos varactor by using S parameter.
Q=imag(Y11)/real(Y11)
one port setup.

I varied the width & length and check the Q.

I found that Q is much higher when length  is large for a given area.
It is completely contradictory to the theory that nwell resistor is the main source of resistance, should keep length to min.

I suspect the foundry does not model the varactor properly.
Now the behavior looks like a nmos gate leakage instead.

can you just look at the real resistance of the varactor. What sort of model is the foundry providing you - just S parameter model?

As in previous post, Q becomes better if the length is larger.


The contradictory statement: In many journals, the length should be set to around the min length so that the Q is not degraded.

I simulated the Q with sp analysis. Foundry does not provide Q for nmosvar
Foundry does not provide discrete length.

It looks correct if using AC analysis.
The Q is quite reasonable.
thank you very much!
just wonder why sp fail to give me the correct result..
I seldom use sp analysis since i am new to RF

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Hi Casual,

Many foundries have an nmosvar and nmosvar_rf - the rf version is characterized for high frequencies whereas the non-rf version works only for low frequencies; and so if you run a rf simulation on the low frequency version, results may not be very meaningful.