  Forum Pages: 1 Modeling of Divider with Delta-Sigma Modulator in Phase-Domain (Read 512 times)
 ussmueller New Member Offline Posts: 3 Modeling of Divider with Delta-Sigma Modulator in Phase-Domain Jun 01st, 2010, 4:09am   Dear all,I'm currently trying to implement a Delta-Sigma (DS) modulator phase domain model. I have not understood the model in Ken's paper (Predicting the phase-noise and jitter of of PLL based frequency synthesizers, page 24).parameter real n = 0 from [0:inf); // white output phase noise (rads2/Hz)parameter real bw = 1 from (0:inf); // ΔΣ modulator bandwidthparameter real fmax = 10∗bw from (bw:inf); // maximum frequency of concern...Theta(out) <+ Theta(in) / (ratio + noise_table([0, n,bw, n,fmax, n∗pow((fmax/bw),order)], �dsn�));The divide ratio consists of the "wanted" part ratio and the delta-sigma noise. Ratio can be a fractional number. The delta sigma noise is modeled with the noise_table function. The noise of the divider is not modeled. Are these assumptions corrrect?What do the parameters n, bw and fmax describe? Is fmax = fref/2? What is meant by DS bandwidth. To my understanding a DS has a constant slope of order*20dB/dec and has no high pass function. How to extract the parameter n?Is it possible to use a transfer function in the z-domain (e.g. (1 - z^-1)^3 for a MASH-111) instead of the noise_table function?Thanks for your support.Thomas Back to top IP Logged
 cheap_salary Senior Member    Offline Posts: 162 Re: Modeling of Divider with Delta-Sigma Modulator in Phase-Domain Reply #1 - Feb 10th, 2016, 9:50pm   ussmueller wrote on Jun 1st, 2010, 4:09am:Is it possible to use a transfer function in the z-domain (e.g. (1 - z^-1)^3 for a MASH-111) instead of the noise_table function? See http://www.designers-guide.org/Forum/YaBB.pl?num=1298380482/1#1zi_nd() could not work in small signal analysis of Cadence Spectre Verilog-A over very long time.Now zi_nd() can work in small signal analyses such as ac and noise of Cadence Spectre.I confirmed it in Cadence Spectre-14.1.See http://www.designers-guide.org/Forum/YaBB.pl?num=1444923186/6#6However zi_np(), zi_zd() and zi_zp() still can not work in Cadence Spectre Verilog-A.On the other hand, all of zi_nd(), zi_np(), zi_zd() and zi_zp() can work on Synopsys Hspice Verilog-A even if its version is fairly old. Back to top IP Logged Pages: 1