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DP_Design

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Is there any LDO with output voltage which is the same as reference?
Jun 09^th, 2010, 1:52am

I am going to design LDO that supplys 1.2V stable output.
I should use 1.2V reference voltage (BGR output) , which is the same voltage level of LDO output.
Generally LDO output is divided by voltage divider consisted of resistors such as attached figure.

Then Can I design the LDO without output divider?
If R1->0, is it ok ?

The alternative will be reference voltage division but i can't.

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AnalogDE Senior Member Offline Posts: 137	Re: Is there any LDO with output voltage which is the same as reference? Reply #1 - Jun 9^th, 2010, 11:23am Remove R1 and R2, take Out node to '-' input of opamp, then you just have a regular unity-gain buffer.
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DP_Design

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Re: Is there any LDO with output voltage which is the same as reference?
Reply #2 - Jun 9^th, 2010, 6:02pm

If I Use Unity-gain buffer, then the Output Load transistor should be so big for current driving and then Op amp gain decreased. Is it Ok? LDO supplies over 100mA. AnalogDE wrote on Jun 9^th, 2010, 11:23am:

Remove R1 and R2, take Out node to '-' input of opamp, then you just have a regular unity-gain buffer.

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Mayank

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Re: Is there any LDO with output voltage which is the same as reference?
Reply #3 - Jun 9^th, 2010, 9:31pm

Quote:

Remove R1 and R2, take Out node to '-' input of opamp, then you just have a regular unity-gain buffer.

If you take the OUT Node shown in Fig. back to Opamp I/p Terminal, then it is not a Unity Gain Config.
Unity Gain Config will only be formed when you take the Opamp Output( i.e. gate of pMOS ) directly to it's i/p which doesnt make any sense for LDO.

Taking OUT node back to opamp is Ok, & it's done sometimes.
Just take care of the Big Bypass Cap you put at OUT Node doesnt affect the I/p Terminal of the Opamp.

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Mayank

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DP_Design

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Re: Is there any LDO with output voltage which is the same as reference?
Reply #4 - Jun 10^th, 2010, 12:54am

Mayank wrote on Jun 9^th, 2010, 9:31pm:

Quote:

Remove R1 and R2, take Out node to '-' input of opamp, then you just have a regular unity-gain buffer.

If you take the OUT Node shown in Fig. back to Opamp I/p Terminal, then it is not a Unity Gain Config.
Unity Gain Config will only be formed when you take the Opamp Output( i.e. gate of pMOS ) directly to it's i/p which doesnt make any sense for LDO.

Taking OUT node back to opamp is Ok, & it's done sometimes.
Just take care of the Big Bypass Cap you put at OUT Node doesnt affect the I/p Terminal of the Opamp.

--
Mayank

Thanks for your answer, Mayank.
Do You mean "Taking Out node back to opamp" is "R1=0" ?
And What will be the problem of opamp affected by cap?
I can't get it..

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Mayank

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Re: Is there any LDO with output voltage which is the same as reference?
Reply #5 - Jun 10^th, 2010, 9:02pm

Quote:

Do You mean "Taking Out node back to opamp" is "R1=0" ?

Yes, exactly.

Quote:

And What will be the problem of opamp affected by cap?
I can't get it..

The OUT node is slow coz of a large cap.
Just draw a small signal, solve KCLs & find out if you are not getting sm unnecessary Poles/Zeros -- just to be on a safer side.
I dont think it should be a problem.

--
Mayank.

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