Mayank wrote on Jun 14th, 2010, 11:06pm: Quote: Theoretically speaking, if Loop Filter BW is much lesser (say a decade lesser) than Δ-Σ modulation Frequency, then Loop Filter should filter out all high-frequency components & we should get a constant desired frequency (say, 800.88 MHz)
@ Others : Do we all agree with this statement ??
Strictly speaking, No. But it is very enough constant frequency.
Mayank wrote on Jun 14th, 2010, 11:06pm:@ rfcooltools : That being said & considered true to our knowledge, Can we run PSS/pnoise analysis on Fractional PLLs then ??
No, although I don't know what simulator you use as "PSS/Pnoise".
See
http://www.designers-guide.org/Forum/YaBB.pl?num=1268969030The followings are general notes for you.
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Always describe correct tool's name and vendor's name which you use as tool or simulator.- Don't do multiple posts which are same content.
- Don't request source code or behavioral model without any efforts.
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There are many simulators which have analyses called as PSS, PAC and Pnoise.- Describe in detail with using correct terminologies.
- Warnigns are different from Errors.
- ADS is not name of simulator.
- There is no tool which name is Cadence.
- Don't use Direct Plot of Cadence ADE blindly without knowing definition.
- All gains in Direct Plot of Cadence ADE are "right", "true" and "practical" voltage gain.
- Don't mix up Simulation with Post Processing. They are completely different phase.
- MATLAB are different from Simulink.
- Learn measurements using actual instruments. Not "EDA Tool Play