Hi all,
I have a question regarding static power calculation for a or2 gate.
Let say that A,B = 0 and only subthreshold leakage is observed.
regarding the attach schematic, can i write :
I_t1 = PMOS sat= µ.Cox.(W
1/2L) (Vsg + Vt)
2I_t2 = PMOS sat= µ.Cox.(W
2/2L) (Vsg + Vt)
2I_t3 = NMOS sub= µ.Cox.(W
3/L) Vt
2 e((Vgs-Vth)/nVt)
I_t4 = NMOS sub= µ.Cox.(W
4/L) Vt
2 e((Vgs-Vth)/nVt)
I_t5 = PMOS sub=µ.Cox.(W
5/L) Vt
2 e((Vgs-Vth)/nVt)
I_t6 = NMOS sat= µ.Cox.(W
6/2L) (Vgs - Vt)
2Please let me know if you think that these equation are correct,
and also i m not sure about the way to add them.
do i have to add them all to find the static power ?
thank you for your time,
David.
ps : Let me know if you have an example of this kind of calculation