i have designed a sc circuit, as the figure shows, Cs=Cf, Vout=Vout+ - Vout- = (Vin+ - Vin-) - (Vref+ - Vref-), Vin = Vin+ - Vin- = (0V~2V), Vref = Vref+ - Vref- = 1V, Vout = Vout+ - Vout- = (-1V~+1V), my question is, when the output is small (150mV or small), the settling accuracy decreases a lot, for example: when (Vin+ - Vin-) - (Vref+ - Vref-) = 1.2V, the settling accuracy is 14bit (Vout = 1.19994V), but when (Vin+ - Vin-) - (Vref+ - Vref-) = 100mV, Vout = 99.85mV (9 bit accuracy), when (Vin+ - Vin-) - (Vref+ - Vref-) is even smaller, the settling accuracy is 8bit or less, why? what is the possible reason?

Cs=1.3pF, opamp is two stage (fold cascode + common source) with cascode compensation.

please help me, thanks all.

I think your amplifier is probably doing OK.  The accuracy is defined in terms of LSBs, not absolute voltages.  Otherwise, you would expect you amplifier to be getting more accurate at smaller inputs.

Here is a thought experiment to explain what I mean.  Imagine you wanted your amplifier to settle to 10b (about 1 part in 1000).  Your full-scale is 1V.  So if you put in a volt, and have unity gain, you would expect an output of 999mV, for a 1mV settling error (1 LSB at a 10-bit level).  Now put in 10mV.  For 1-part-in-1000 settling you now expect only an error of 10 uV!  Your settling in that case would probably be upset by thermal noise (I don't know the performance of your op amp)

Carl

I think it is natural for every circuit (not only yours) to have smaller accuracy as the signal level decreases, and the reason is simple:
since the noise (or error) source remains constant the signal level varies. Thus the signal to noise ratio diminishes and therefore the equivalent number of bits gets reduced; where ENOB is calculated as the log2(SNR)

Best
Tosei