supermoment wrote on Oct 7th, 2010, 9:11pm:Poly orientation can affect the chip yield.
What is the recommended poly orientation should be set in some PDK? Horizontal or vertical?
Horizontal or vertical orientation is a matter of perspective. If I were to turn the wafer by 90 degrees, this definition would change. As emphasized by the others, you need to keep poly orientation the same in most of the advanced processes so that the transistors show similar behavior.
The primary reason is lithographic constraints, which require poly structures to be aligned in direction and repeat at a certain pitch in order to be able to form the gates correctly. This is of course mainly a constraint for the transistors with the narrowest channel lengths. So if you have several different kinds of devices available such as higher-voltage devices which were basically ported from older processes, then the above constraints may not apply.
I don't believe that a fixed orientation requirement existed in 0.18 um or even in 0.13 um if I recall correctly. Just check for the technologies where the gate length becomes smaller than the wavelength of light used in the lithographic process. I would guess that the constraint would start to appear around there.
That being said, you always want the same alignment for matching structures, and secondly, the term "poly" does not refer to polysilicon in some of the most modern processes which employ metal gates as there is no amorphous poly-Si being formed there. The term "poly" is simply a relic from the past and used for convenience as people are used to referring to the gate layer as poly. It's like using the term MOSFET for all FETs in the older technologies. There was no metal gate except in the very very first MOS technologies, but poly, but we keep using the term MOSFET. Now, we have MOSFETs again....
Vivek