Dear Forum,

I want to design fractional PLL with hspice and verilog, the analog part with hspice and digital part with verilog.
So now I am searching for some good doc about the schematic of fractional PLL. I know the PLL schematic, however I am not very familiar with fractional PLL schematic.

Please let me know if you have some familiarity with fractional PLL and its schematic. Any info would be helpful.

Thanks,
Hayk

Thanks for the link, very helpful!!!