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mismatch requirement calculation of the 1st stage of pipeline (Read 1505 times)
icisee
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Posts: 1
mismatch requirement calculation of the 1st stage of pipeline
Dec 15
th
, 2010, 8:15pm
How to calculate the mismatch requirement of the 1st stage of Pipeline ADC for INL less than 2 LSB?
2.5 Bits/stage (M=3)
Resolution:12bit (N=12)
Vref: 1V (Vref=1V)
Swing(diff):2Vpp (Vsw=2V)
Any advice or reference paper are welcome.
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carlgrace
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Posts: 231
Berkeley, CA
Re: mismatch requirement calculation of the 1st stage of pipeline
Reply #1 -
Dec 17
th
, 2010, 3:14pm
Search for PhD theses of Cho and Abo.
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