rf-design wrote on Jan 7th, 2011, 12:57am:DA is know long time and for instance the reason why integrated high resolution ADCs (>20Bit) are working with SC techniques instead of relative long time continuous integration techniques like Dual/Multi-Slope.
DA lead to INL far below 20bit for integrated caps. In SC Circuits the clock period is relative short in relation to the wide spread time constants of the ionic transport mechanism. So only a small part of the slow ions are moved. The good part is that the signal relations withing the SC circuit are all using the same time periods. So in effect the matching of DA time constants would affect linearity.
Reiner
Reiner,
I know that DA and its effects are known for a long while (one does read it about it even if very briefly in undergraduate physics), but I was unaware that it was the reason for using SC techniques instead of continuous-time (CT) techniques. I would have imagined that CT techniques would anyway suffer from way too much inaccuracy that one could not even get to 10 bits, let along 20 bits of accuracy, because one would be trying to match not 2 identically laid out components but trying to keep stable timeconstants.
For instance, one can use CT techniques today in making CT delta-sigma modulators, which also have poorer control of timeconstants and poorer accuracy but I never heard of DA being the major reason there. It would be interesting to see if there are any papers (obviously older ones) that discuss this limitation as the reason for using SC solutions.
Obviously, your comments about the effects of DA cancelling out in SC solutions due to use of a common clock are spot on.
Regards,
Vivek