sheldon
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Greetings,
There are a couple of other options: 1) If the divide ratio is low enough you can use PSS/PXF to directly calculate the power supply rejection. 2) You can use the Spectre RF noise aware PLL flow to accelerate your transient simulations a) When you generate the VCO model, include the power supply effects in the model b) You need to think about how to simulate the design, for example, PFD, CP, and counters at transistor level with the VCO and pre-scaler as behavioral
If you use the noise meter, you can directly access the impact of the supply noise on the phase noise of the PLL using the noise_meter.
Best Regards,
Sheldon
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