Hi,

I came across these two ckts several times, just wanna lay out my understanding  and see if I'm correct or not.

for ckt (a) my guess is it's  to maintain the output when S1 was ON (instead of floating), and immune the output from noise and spikes,  similarly for (b)  if swiches are added in similar fashion

any suggestions are appreciated, thanks!

Steve

wave wrote on Mar 7^th, 2011, 11:11am:


Hi Wave,
u r right, (a) is d latch, by defintion it outputs signal when clk comes (here switch S1) and maintain the signal otherwise, so is what i said correct or I'm still missing the point, please clarify. and btw, what's the difference between this d latch and the more general one that uses two NAND (or XOR) ?

for (b) can you elaborate?  i'm a little bit slow

thanks,
Steve