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purplewolf Senior Member Offline Posts: 103	6mA from 10 uA current mirror May 17^th, 2011, 2:01pm Hello, I want to generate 8mA from 10uA reference in 180 nm CMOS with Vdd = 1.8V. I want to know 1) Whether its a good idea or i need to redesign my circuit for lower current consumption 2)What sort of mirroing structures do i need to get this amound of current and get high output impedance and good voltage headroom as well.
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Lex Senior Member Offline Posts: 201 Eindhoven, Holland	Re: 6mA from 10 uA current mirror Reply #1 - May 18^th, 2011, 4:24am 1. If your current is going to be in the mA range, you should closely watch your layout to avoid ohmic voltage drops. That might be substantial compared to the uA range. 2. For starters, you could try cascodes. Small price to pay in terms of headroom, i would say.
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RobG

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Re: 6mA from 10 uA current mirror
Reply #2 - May 18^th, 2011, 8:20am

purplewolf wrote on May 17^th, 2011, 2:01pm:

Hello,
� I want to generate 8mA from 10uA reference in 180 nm CMOS with Vdd = 1.8V. I want to know
1) Whether its a good idea or i need to redesign my circuit for lower current consumption
2)What sort of mirroing structures do i need to get this amound of current and get high output impedance and good voltage headroom as well.

Lots of area would be the main issue. That is roughly a 10 bit DAC so it's doable, but you are going to have 800 unit cells (or 2 mirrors with sqrt(800) cells, etc) unless you don't need an accurate ratio; then you can use different widths and lengths to help you out. Cascodes and watch the IR drop like Alexandar said.

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ywguo

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Re: 6mA from 10 uA current mirror
Reply #3 - May 18^th, 2011, 8:49am

Hi Purplewolf,

The answer to the first question lies in your mind or your application. I don't know why you do need to generate 8mA output from 10uA reference. I don't know your power specification, either. So I cannot answer your question. But I know that lies in your mind and you are the only one that can answer this question.

To get high output impedance and good voltage headroom, you'd better adopt a high output swing, high voltage headroom current mirror, which you can find in most textbooks. This is a simple answer, because you does not put more constraints on your question.

I hope my answer is helpful to you. However it may be not because you had not put forward a good, clear question.

Best Regards,
Yawei

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SATurn Community Member Offline Posts: 53	Re: 6mA from 10 uA current mirror Reply #4 - May 18^th, 2011, 2:41pm Hi, One more point, you may want to do it in few steps which means for example multiplying the reference current by 10 in three steps ! SATurn
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loose-electron

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Re: 6mA from 10 uA current mirror
Reply #5 - May 18^th, 2011, 5:58pm

When the reference to the output has a large ratio the multiply in stages has some merit, but also the use of an alignment and control circuit of some form is not a bad idea.

Measure the output, provide feedback.

If you are trying to get an output voltage across an external load, measure the voltage and adjust the current as appropriate.

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Jerry Twomey
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raja.cedt Senior Fellow Offline Posts: 1516 Germany	Re: 6mA from 10 uA current mirror Reply #6 - May 19^th, 2011, 11:52am hi..seems very hard spec. I guess many people forgot to mention about noise multiplication. In current mirrors noise of the o/p current will be equal to reference current noise*(N^2). @loose-electron: i didn't understand your reply. Could you please explain again. Thanks.
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purplewolf

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Re: 6mA from 10 uA current mirror
Reply #7 - May 20^th, 2011, 2:53am

@All Thanks for answer.
I am not concerned about power dissipation and area . But, yes I am concerned about noise very much as it will feed a VCO core. I know its a 600x mirroring factor But i just wonder
1)Can high voltage swing and large output impedance can be acheived by simple cascading multiple stages of current mirrors to get the desired current ratio. I can sacrifie 0.4V drop. if somebody has designed with a substantial mirror ratio can share his experience .
2)Is it also the case if one stage is NMOS the other must be PMOS and so forth?
3) Since i have no experience in current mirror design and I have time constraints as well,I could redesign my circuit for lower current at the cost of phase noise. What is the suggested limit of current I should use? .

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loose-electron

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Re: 6mA from 10 uA current mirror
Reply #8 - May 20^th, 2011, 1:42pm

raja.cedt wrote on May 19^th, 2011, 11:52am:

hi..seems very hard spec. I guess many people forgot to mention about noise multiplication. In current mirrors �noise of the o/p current will be equal to reference current noise*(N^2).

@loose-electron: i didn't understand your reply. Could you please explain again.

Thanks.

Some people do current mirror cascading: do 1:10 mirror, which feeds 1:10 ratrio, which feeds 1:10 ratio to get 1000X current multiplication.

However, it multiplies noise through every stage, but keeps the geometry ratios closer.

If you are going to do geometry scaling to drive bias into a VCO you are going to get tons of flicker noise mapping into jitter.

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Jerry Twomey
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