kunhsun
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I use the verilog-A model to substitute PFD,CP and the divider block in the PLL to run a phase noise simulation by Spectre-RF. I follow the same steps (period steady state simulation-->phase noise simulation) as usual. For a ideal verilog-A model,there is no noise exists,and it can not find steady state solution.So,I can not run phase noise simulation if I just use a ideal verilog-A model. What method should I use to do the phase noise simulation if I want to run a block that described by verilog-A model? ~thanks~
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