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VHDL-AMS VBIC model? (Read 3485 times)

the_pd New Member Offline Posts: 1	VHDL-AMS VBIC model? Sep 16^th, 2011, 4:09pm I am in need of a VHDL-AMS VBIC implementation. So far, it looks like Verilog-A is the language of choice, however. Anyone know where I could find a VBIC model in VHDL-AMS? Thanks!
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loose-electron Senior Fellow Offline Best Design Tool = Capable Designers Posts: 1638 San Diego California	Re: VHDL-AMS VBIC model? Reply #1 - Sep 18^th, 2011, 1:45pm Strange mix of platfoms. Verilog A or AMS is generally used for functional level models, not transistor level models. If you need to simulate at the transistor level, perhaps you should consider using a EDA platform with a Spice-Spectre type of simulator?
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Geoffrey_Coram

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Re: VHDL-AMS VBIC model?
Reply #2 - Sep 19^th, 2011, 8:20am

loose-electron wrote on Sep 18^th, 2011, 1:45pm:

Verilog A or AMS is generally used for functional level models, not transistor level models.

Jerry - You've missed the revolution in transistor-level compact modeling: almost all the latest transistor models (PSP, BSIMSOI, VBIC, Mextram, Hicum, ... and soon BSIM6) are written/developed in Verilog-A. Spectre, HSpice, Eldo, etc. all have Verilog-A compilers. The users can then modify the source code to add new equations / model features.

That said, it is Verilog-A; I can't recall ever seeing a compact model written in VHDL-AMS, other than maybe a basic diode as an example. Verilog-AMS added a bunch of features to the language in LRM 2.2 to make compact modeling easier, and that's where the developers have gone.

If at first you do succeed, STOP, raise your standards, and stop wasting your time.

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