aistudy
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Hello,
I am new at in the domain of Verilog-A and the design of systems.
I'm working as research assistant since some weeks and should replace system designs with SDD's from Agilent ADS with Verilog-A.
I have the problem that I don't know how I could change the used state equations from the 5-port SDD for using in Verilog-A.
The problematic formula are only implicit equations:
F[3,0]=t0n*(_v3-vst)/tau3 F[3,1]=t0n*_v3
At most the weighted function in frequency domain with complex numbers is a ploblem for me.
F4[4,0]=_i4 F4[4,4]=_v4*_v2 H[4]=(rth/WF)/(1+j*2*PI*freq*tauD)
Can anyone help me to solve my problem?
Thanks a lot
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