Thank you loose-electron. You are right, early voltage is more of a BJT term.
Following are few sentences from the paper I mentioned earlier.
“In addition to the discussed design method(gm/id methodology), we included an additional optimization in the design phase: choosing the transistor lengths (L) to minimize power. In order to accomplish that, we consider another important characteristic related with the gm/ID curve: the relationship between gm/ID versus VA (the Early Voltage parameter). This relationship is considered as a fundamental device
technology relation that determines the minimum allowable transistor lengths. Once the values of the gm/ID ratio and VA parameter (that is directly related with the transistor output resistance, and consequently with the stage DC gain) are chosen, the L of the transistors can be determined in our methodology.
Considering both characteristics, the design procedure consists in two basic phases. First, the W/L of each transistor is found through the gm/ID vs. ID/(W/L) curve. Then, the transistor lengths (L) are found considering the gm/ID vs. VA curve.”
The authors say, "one can find the transistor length from the graph of gm/id vs Va".
I am looking for a procedure or method that helps me plot gm/id vs va in cadence tool.
Thanks a lot...
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vinay