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question about charge pump in PLL (Read 19506 times)
RobG
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Re: question about charge pump in PLL
Reply #15 - Dec 06th, 2011, 6:50am
 
loose-electron wrote on Dec 6th, 2011, 2:15am:
ece.wpi.edu/analog/resources/PLLTutorialISSCC2004.pdf

see page 50 of the above

I like it  8-)
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loose-electron
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Re: question about charge pump in PLL
Reply #16 - Dec 6th, 2011, 10:12am
 
I refine that structure a bit with:

Minimum size transitors in the H bridge to minimize charge injection.

PMOS transistors top of bridge only.

NMOS transistors bottom of bridge only

limit signal amplitude ti the 4 currrent steering switches

All of the above gets the device closer to ideal switches to redirect the charge pump current and reduce transient signal current injection.
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Re: question about charge pump in PLL
Reply #17 - Dec 13th, 2011, 10:50pm
 
loose-electron wrote on Dec 6th, 2011, 10:12am:
I refine that structure a bit with:

Minimum size transitors in the H bridge to minimize charge injection.

PMOS transistors top of bridge only.

NMOS transistors bottom of bridge only

limit signal amplitude ti the 4 currrent steering switches

All of the above gets the device closer to ideal switches to redirect the charge pump current and reduce transient signal current injection.

Hi Jerry,
Why you didn't use CMOS switches? I think based on the modifications you did (small size and limited signal swing to control switches), if you use CMOS instead only PMOS on top and only NMOS on bottom, it might be better to reduce charge sharing and clock feedthrough?

By the way, with your modification, how much reference spur can you get with this charge pump?

Thanks,

Lunren
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Lunren
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Re: question about charge pump in PLL
Reply #18 - Dec 16th, 2011, 11:18am
 
lunren wrote on Dec 13th, 2011, 10:50pm:
loose-electron wrote on Dec 6th, 2011, 10:12am:
I refine that structure a bit with:

Minimum size transitors in the H bridge to minimize charge injection.

PMOS transistors top of bridge only.

NMOS transistors bottom of bridge only

limit signal amplitude ti the 4 currrent steering switches

All of the above gets the device closer to ideal switches to redirect the charge pump current and reduce transient signal current injection.

Hi Jerry,
Why you didn't use CMOS switches? I think based on the modifications you did (small size and limited signal swing to control switches), if you use CMOS instead only PMOS on top and only NMOS on bottom, it might be better to reduce charge sharing and clock feedthrough?

By the way, with your modification, how much reference spur can you get with this charge pump?

Thanks,

Lunren


Lunren, I think Jerry is talking about using diff-pairs to steer current instead of switches. With a diff pair you only need a few hundred millivolts to steer the current between the opamp output and the capacitor network.

rg
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Re: question about charge pump in PLL
Reply #19 - Dec 18th, 2011, 2:13pm
 
At the end of the day it looks more like current
steering than rail to rail gate driven switches.

Spurs? Depends on your primary hold
capacitors and similar issues. Specific numbers are unique
to a system.

Key thing here is getting the current steering
switches to look as close to ideal as possible.

Also, things like the PFD need to account for
the zero phase point and avoiding deadbanding issues.

PLL's have a lot of little things that affect performance.
I could write a book!
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Re: question about charge pump in PLL
Reply #20 - Dec 18th, 2011, 11:30pm
 
Hi Rg,

I got it. Thanks.
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Lunren
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Re: question about charge pump in PLL
Reply #21 - Dec 18th, 2011, 11:53pm
 
loose-electron wrote on Dec 18th, 2011, 2:13pm:
At the end of the day it looks more like current
steering than rail to rail gate driven switches.

Spurs? Depends on your primary hold
capacitors and similar issues. Specific numbers are unique
to a system.

Key thing here is getting the current steering
switches to look as close to ideal as possible.

Also, things like the PFD need to account for
the zero phase point and avoiding deadbanding issues.

PLL's have a lot of little things that affect performance.
I could write a book!


Hi Jerry,
What do you mean by zero phase point? I think you are saying the phase difference between reference clock and feedback clock should be zero, right? But I think this phase error is more related to mismatching in charge pump other than PFD itself (assuming the up and down path in PFD is perfectly matching).
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Lunren
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loose-electron
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Re: question about charge pump in PLL
Reply #22 - Dec 19th, 2011, 12:18pm
 
Zero phase point is when the two inputs to the PFD
are exactly in line with each other.
Behavior needs to be carefully examined here.

PFD at this point is often created to give equal size up-down pulses

Static phase errors are what you mention, offsets, mismatches, etc.
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Re: question about charge pump in PLL
Reply #23 - Dec 19th, 2011, 5:40pm
 
Quote:
PLL's have a lot of little things that affect performance.
I could write a book!


Looking forward to it  :D
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Re: question about charge pump in PLL
Reply #24 - Dec 19th, 2011, 11:39pm
 
loose-electron wrote on Dec 18th, 2011, 2:13pm:
...

I could write a book!


Do you already accept pre-orders?  ;D
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Re: question about charge pump in PLL
Reply #25 - Dec 21st, 2011, 10:43am
 
Thing is electronics books don't sell to a wide audience.

It's on my bucket list....

Serious interest?
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Re: question about charge pump in PLL
Reply #26 - Dec 21st, 2011, 11:48am
 
Jerry,
    Writing a book is a big endeavor, and if it does not become a widely used textbook is generally not that profitable. As an alternative, you might consider writing smaller tutorials. I would be happy to publish them on this site. You would not make any money of course, but you can have a big impact.

-Ken
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Re: question about charge pump in PLL
Reply #27 - Dec 21st, 2011, 4:30pm
 
Throughout my postgrad studies - and even now - I've been looking for that book that will explain things in a more engineering fashion. i.e the practical implementation of all the fundamentals we see in textbooks and papers. I think it would be a good read and a useful reference...I'm always looking for good tutorial papers too though.


Aaron
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Re: question about charge pump in PLL
Reply #28 - Dec 22nd, 2011, 4:14am
 
Forum Administrator wrote on Dec 21st, 2011, 11:48am:
Jerry,
    Writing a book is a big endeavor, and if it does not become a widely used textbook is generally not that profitable. As an alternative, you might consider writing smaller tutorials. I would be happy to publish them on this site. You would not make any money of course, but you can have a big impact.

-Ken


Ken:
Yeah, I am very aware that its a thankless and profitless endeavor.
McGraw Hill wanted me to do something for them a while back and I deferred
due to lack of time and sufficient financial motivation.
Let me give some thought to your suggestion.

Jerry
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loose-electron
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Re: question about charge pump in PLL
Reply #29 - Dec 22nd, 2011, 4:20am
 
aaron_do wrote on Dec 21st, 2011, 4:30pm:
Throughout my postgrad studies - and even now - I've been looking for that book that will explain things in a more engineering fashion. i.e the practical implementation of all the fundamentals we see in textbooks and papers. I think it would be a good read and a useful reference...I'm always looking for good tutorial papers too though.


Aaron


Well, as a reviewer for 6-8 years for both IEEE JSSC and IEEE MTT,
I was always pushing for the inclusion of the practical and useful aspects
in addition to the mathmatical analysis.

Never happened, you review a paper with a panel of others and it
gets shot down. Most reviewers are coming at it from the view
of a university professor.

Thats the big reason I write for the trade magazines instead.
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Jerry Twomey
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