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Do I need Tie-high even if nMOS's source/drain isn't rigidly grounded? (Read 512 times)

nandy Junior Member Offline Posts: 29 Timbuktu	Do I need Tie-high even if nMOS's source/drain isn't rigidly grounded? Dec 8^th, 2011, 11:15pm Should I use tie-high cells only for gates of those nmos whose source/drain is connected to another rigid supply (like GND) or should I use it for all nmos whose gate is connected to VDD irrespective of where the source/drain are connected? Thanks
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loose-electron Senior Fellow Offline Best Design Tool = Capable Designers Posts: 1638 San Diego California	Re: Do I need Tie-high even if nMOS's source/drain isn't rigidly grounded? Reply #1 - Dec 9^th, 2011, 5:40pm Substrate tie downs to ground and N-Well tie ups to the power rail should be used used a lot. More than the minimum required by design rules. Less latch up problems, less substrate noise problems.
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carlgrace

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Re: Do I need Tie-high even if nMOS's source/drain isn't rigidly grounded?
Reply #2 - Dec 15^th, 2011, 9:09pm

Are you talking about connecting the gate of a logic cell transistor to VDD or GND? In that case you should ALWAYS use a tie-hi or tie-lo standard cell. Otherwise you are Playing With Fire.

If you're talking about substrate and well tie-downs then loose-electron is exactly right.

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