I seem to be doing something silly but can't see what's wrong.  I wanted to model a schmidt trigger input inverter in verilog-A where the output stage is modeled as a pair of resistors.  Resistor #1 goes from the power supply pin to the output and resistor #2 goes from the output to ground.  The value of the resistors is controlled by an internal state variable.

In the following code, if I drive A1 with a square wave input, I can plot the state variable S1 and see it following the input (but inverted) but the output (Y1) is not moving at all.  It is stuck at VDD.  

The reason I wanted to drive my output this way is it
a)  keeps the output coupled to the supplies at all times so if I have wiggles on VDD while my output is high, my output follows and

b) if I'm driving a capacitive load then I'll pull currents from VDD and VSS appropriately.

Any ideas?

Thanks
-Dan

electrical A1, Y1, VDD, VSS;
input A1, VDD, VSS;
output Y1;
parameter real high_percent=0.6;
parameter real low_percent=0.4;
parameter real rhigh=10e6;
parameter real rlow=10.0;
parameter real cout=10p;

integer S1;
analog begin

    // when we are above the high threshold, set the state to 0.
   // do I need an @cross possibly with a $discontinuity(0)?
     @(above( V(A1,VSS) - high_percent*V(VDD,VSS))) begin
      S1 = 0;
     end
     
    // when we are below the low threshold, set the state to 1.
     @(above( low_percent*V(VDD,VSS) - V(A1,VSS))) begin
      S1 = 1;
     end
     
    // put in the resistors
     V(Y1,VDD) <+ I(Y1,VDD)*transition( S1 ? rlow : rhigh, 1n);
     V(Y1,VSS) <+ I(Y1,VSS)*transition( S1 ? rhigh : rlow, 1n);
    // and some capacitance to ground
     I(Y1, VSS) <+ cout*ddt(V(Y1,VSS));
end // analog

I'm not sure that I can multiply transition anything.  I've tried without the transition filter.  As for the current level, I'm basically trying to model a pair of resistors. One to VDD and one to VSS.  I've also tried creating an internal electrical like

electrical VS1;

     V(VS1) <+ transition(S1, 1n);
     V(Y1,VDD) <+ I(Y1,VDD)*(rlow*V(VS1)  + rhigh*(1.0 - V(VS1)));
     V(Y1,VSS) <+ I(Y1,VSS)*(rhigh*V(VS1) + rlow*(1.0 - V(VS1)));
     I(Y1, VSS) <+ cout*ddt(V(Y1,VSS));

Do I need to not list both V and I on the left side of <+ ?

Ken,

Yes, I meant to specify 0 delay and then 1n for the transition time.  Unfortunately it didn't help.

-Dan