Hi all,


I have a PCB which uses a 50-ohm microstrip line for the signal path that connects to a QFN package and ultimately to the chip. However, the microstrip line width is about twice as wide as the QFN PCB pad for the signal. Therefore, Z0 is higher for the microstrip at the area around the package. This results in a bandwidth limit at which point, the matching is too poor for my design.

Now I realise that the bondwire itself will also result in a bandwidth limitation, but neglecting that, what is the best way to maximize the bandwidth of the impedance match apart from the obvious methods such as getting as close as possible to the chip w/ the line, or reducing the height of the line above the ground plane so the mismatch isn't so great.

Also, does anybody know of an upper limit on the bandwidth of a QFN package? Some references would be nice.


thanks,
Aaron

8 GHz with S11<-10dB?