Hi,
I have a system with 21 digital outputs. The outputs are sort of thermometer coded. But in thermometer code 00001 is 1 and 00011 is 2 and I guess 00010 is invalid. But in my case both 00001 and 00010 are equal to 1 and  00011 and 10001 are equal to 2. That is the total number of 1's decides the output of DAC and not the order in which the one's are placed.

So to convert this type of coding to analog, I used a DAC with 21 current sources which are matched. Now I need a differential output from the DAC and for this purpose I used a current conveyor at the DAC output which convets the current from DAC into a positive and negative current.

I am doing all this in cmos integrated circuit. And the DAC is part of a Sigma Delta ADC. When I simulate the whole Sig-Del ADC with Ideal DAC (by ideal DAC i mean a DAC coded in VerilogA),I get very small harmoincs. but when I use the DAC that I designed, I get a small 2nd harmoinc and a large third harmoinc.

Can you please suggest a better implementation for the DAC or point me to some literature about reducing DAC harmoincs?

Hi Sheldon,
I have found out that the harmonics are coming from the current conveyor. Rather the current mirrors at the output of the current conveyor. In my band of interest they give an snr of 40dB. Since there is no other noise in the conveyor except from the harmoinc distortion so i guess i can say sndr = 40dB. now i am trying to linearize the mirrors